Deliverable 1.2: Roadmap priorities from 1st General Workshop with applications

Authors: Enrico Sangiorgi, SiNANO Institute, FR; Francis Balestra, INSTITUT POLYTECHNIQUE DE GRENOBLE, FR; Pascale Caulier, SiNANO Institute, FR; Sylvie Pitot, Grenoble INP, FR


After 5 months of operation, the first General Workshop was successfully organized on April 12-13, 2016 in Minatec, Grenoble, France, by Grenoble INP and SINANO Institute. It was devoted to confront cross-industry presentations spanning six wide and diverse applications (Security, Automotive, Energy, Digital Manufacturing, Internet of Things and Medical/Health) with the NEREID technology domains and project tasks (Beyond CMOS Technologies, Nanoscale FET & Connectivity, Smart Sensors & Smart Energy, System Design & Heterogeneous Integration, Equipment, Materials and Manufacturing Science). The overall method aimed at solving potential market competition problems among application experts by focusing the workshop on high-level abstracted functions and by inviting application experts from separated fields.

Structure and approach of the workshop enabled progress in three fundamental areas:

1) an overview of the future for six key application domains,

2) a comprehensive and synthetic assessment of the available technology base and

3) the definition of general guidelines for the possible alignment of future application requirements with evolving semiconductors technologies.

This preliminary alignment gave interesting results and useful indications, in particular about the main requirements for future applications in the investigated sectors and the possible gaps that could need increased performance of existing technology or the introduction of new functions, based on novel technologies. This first analysis will be further developed in the framework of future Domain (Task/WP) and General Workshops.

The possible ways to look for «generic functions» capable of generating a roadmap for industry will also be studied in the next steps of the project.

Publication Date: 2016/06/15

Location of Publication: NEREID website

Keywords: Semiconductors; Analogue/Mixed Signal Design; Hardware Physical Design; Research/Education